The present invention relates to a method and/or architecture for implementing amplifiers generally and, more particularly, to a method and/or architecture for implementing a common-base amplifier with a high input overload capability and/or tunable transimpedance.
One conventional approach for tuning the transimpedance response of an amplifier is to change the bias current of a common-base input stage. Varying the bias current varies the complex input impedance and voltage gain which changes the overall transimpedance response. However, dramatic changes in the bias current can profoundly change the overload capability of the transimpedance amplifier (TIA). In general, a peaked response is often due to wire-bond parasitics which can result in intersymbol interference (ISI). Such parasitics can be suppressed by reducing the bias current and effective input inductance of a common-base input stage. However, reducing the bias current can severely degrade overload performance. In order to satisfy the need for high current overload capability, a number of approaches for implementing common-base transimpedance pre-amplifier topologies are commonly used.
One such conventional approach is the implementation of common-base input stages that are capable of high input currents (e.g., Vanisri, Tongtod, Toumazou, Chris, xe2x80x9cIntegrated High Frequency Low-Noise Current-Mode Optical Transimpedance Preamplifiers: Theory and Practicexe2x80x9d, IEEE JSSSC, vol. 30, no. 6, June, 1995, pp. 677-685). However, such circuits are biased with a collector current that equals or exceeds the overload current condition. Such an approach typically results in significant shot noise degradation and potential transimpedance gain-bandwidth degradation.
Another conventional common-base approach for improving overload current performance is to use a common-base differential switch to switch between a successive amplifier and the direct output based on the detected received power level (e.g., Van den Broeke, L. A. D., and Nieuwkerk, A. J., xe2x80x9cWide-Band Integrated Optical Receiver with Improved Dynamic Range Using a Current Switch at the Inputxe2x80x9d, IEEE JSSSC, vol. 28, no. 7, July 1993, pp. 862-864).
Referring to FIG. 1, a circuit 10 is shown implementing a conventional common-base input stage. The common-base input allows high input overload capability. However, increasing the current Ic1 such that the current Ic1 greater than an Overload current (Ioverload) specification (typically greater than 2 mA) can result in higher input referred shot noise (i.e., 2qIc1). In addition, higher current Ic1 can result in a peaked transimpedance response which can introduce undesirable noise, large signal transient distortion, and potential instability. However, the current Ic1 must be set greater than Ioverload (2 mA) in order to maintain low TIA distortion.
Referring to FIG. 2, a circuit 20 is shown implementing another conventional common-base input stage. A common-base differential input is used to switch the input to either (i) a direct output when a high input current is detected, or (ii) a successive TIA amplifier when a low input current is detected. However, as in other conventional common-base stages, a high DC collector current Ic1, greater than the maximum signal current (2 mA), is maintained in order to avoid signal clipping at the input. As in the circuit 10, additional noise and transimpedance-bandwidth peaking distortion can result.
Referring to FIG. 3, a DC overload performance of a conventional common-base TIA design is shown. A CB collector bias current of 1.5 mA only provides about 1.4 mA of overload current capability before the output voltage clips. In order to obtain high overload current from a common-base TIA, the quiescent collector current of the common-base transistor must be greater than the maximum input current seen by the TIA of the circuit 20 of Van den Broeke. FIG. 3 shows the DC output voltage versus peak input current Ipd-peak for various common-base collector biases Ic1. High overload is obtained at higher collector biases. However, higher collector current bias also increases noise, gain peaking, large signal overshoot distortion, and potential circuit instability.
Referring to FIG. 4, an Overload Performance with an input current Iin=1.5 mA p-p for a conventional CB design (Ic1=1.5 mA) is shown. The waveform 40 illustrates the input current Iin (Ipd-peak). The waveform 42 illustrates the onset of duty cycle distortion at the output of the pre-amplifier stage. The waveform 44 illustrates the onset of duty cycle distortion at the output.
Referring to FIG. 5, an Overload Performance with an input current Iin=2 mA p-p for a conventional CB design (Ic1=1.5 mA) is shown. The waveform 40xe2x80x2 illustrates the input current Iin (Ipd-peak). The waveform 42xe2x80x2 illustrates significant duty cycle distortion at the output of the pre-amplifier stage. The waveform 44xe2x80x2 illustrates significant duty cycle distortion at the output.
Referring to FIG. 6, an Overload Performance with an input current Iin=2.5 mA p-p for a conventional CB design (Ic1=1.5 mA) is shown. The waveform 40xe2x80x3 illustrates the input current Iin (Ipd-peak). The waveform 42xe2x80x3 illustrates severe duty cycle distortion at the output of the pre-amplifier stage. The waveform 44xe2x80x3 illustrates severe duty cycle distortion at the output.
It would be desirable to implement a transimpedance amplifier that enables the transimpedance response to be tuned without substantially compromising overload performance.
The present invention concerns an apparatus comprising a common-base amplifier circuit and a control circuit. The amplifier circuit may be configured to generate an output signal having a transimpedance bandwidth in response to an input signal. The control circuit may be (i) coupled between the output signal and the input signal and (ii) configured to implement input signal control to provide input overload current capability.
The objects, features and advantages of the present invention include implementing a common-base amplifier with high input overload and tunable transimpedance that may (i) implement high dynamic range transimpedance amplifiers (TIAs) that may be suitable for next generation 10 Gb/s and 40 Gb/s optical receiver applications, (ii) provide state of the art transimpedance amplification for avalanche photodiodes (APDs) and heterojunction photo-transistors (HPTs) with responsivities in a range of 1-10 A/W p-p, (iii) have an overload specification that may be more aggressive than those imposed by typical 10 Gb/s positive-intrinsic-negative (PIN) diode technologies, and/or (iv) provide a TIA which may handle high overload currents (e.g., as defined by a particular design specification) while maintaining low duty cycle and overshoot distortion (e.g., as defined by a particular design specification).